A multiple MC68000 microcomputer system

Date

1986-08

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Publisher

Texas Tech University

Abstract

In this thesis, the design, construction and evaluation of a multiple processor microcomputer system are presented. The design logic of the system is discussed through a review of multiple processor systems which exist today. Their problems are then surveyed. A flexible system consisting of modules of Single Board Computers (SBCs) and Dual Port Memories (DPMs) is developed to try to solve the problems existing in the current systems. Interprocessor communication hardware is constructed to perform the interfacing and timing requirements between control units and the dual port memories. Benchmark programs are designed and coded in the MC68000 Assembly Language to evaluate the system.

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