Radio-frequency integrated-circuit design for CMOS single-chip UWB systems

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Title: Radio-frequency integrated-circuit design for CMOS single-chip UWB systems
Author: Jin, Yalin
Abstract: Low cost , a high -integrated capability , and low -power consumption are the basic requirements for ultra wide band (UWB ) system design in order for the system to be adopted in various commercial electronic devices in the near future . Thus , the highly integrated transceiver is trended to be manufactured by companies using the latest silicon based complimentary metal -oxide -silicon (CMOS ) processes . In this dissertation , several new structural designs are proposed , which provide solutions for some crucial RF blocks in CMOS for UWB for commercial applications . In this dissertation , there is a discussion of the development , as well as an illustration , of a fully -integrated ultra -broadband transmit /receive (T /R ) switch which uses nMOS transistors with deep n -well in a standard 0 .18 - ?m CMOS process . The new CMOS T /R switch exploits patterned -ground -shield on -chip inductors together with MOSFET ?s parasitic capacitances in order to synthesize artificial transmission lines which result in low insertion loss over an extremely wide bandwidth . Within DC -10 GHz , 10 -18 GHz , and 18 -20 GHz , the developed CMOS T /R switch exhibits insertion loss of less than 0 .7 , 1 .0 and 2 .5 dB and isolation between 32 -60 dB , 25 -32 dB , and 25 -27 dB , respectively . The measured 1 -dB power compression point and input third -order intercept point reach as high as 26 .2 and 41 dBm , respectively . Further , there is a discussion and demonstration of a tunable Carrier -based Time -gated UWB transmitter in this dissertation which uses a broadband multiplier , a novel fully integrated single pole single throw (SPST ) switch designed by the CMOS process , where a tunable instantaneous bandwidth from 500 MHz to 4 GHz is exhibited by adjusting the width of the base band impulses in time domain . The SPST switch utilizes the synthetic transmission line concept and multiple reflections technique in order to realize a flat insertion loss less than 1 .5 dB from 3 .1 GHz to 10 .6 GHz and an extremely high isolation of more than 45 dB within this frequency range . A fully integrated complementary LC voltage control oscillator (VCO ) , designed with a tunable buffer , operates from 4 .6 GHz to 5 .9 GHz . The measurement results demonstrate that the integrated VCO has a very low phase noise of ?117 dBc / Hz at 1 MHz offset . The fully integrated VCO achieves a very high figure of merit (FOM ) of 183 .5 using standard CMOS process while consuming 4 mA DC current .
URI: http : / /hdl .handle .net /1969 .1 /ETD -TAMU -2724
Date: 2009-05-15

Citation

Radio-frequency integrated-circuit design for CMOS single-chip UWB systems. Available electronically from http : / /hdl .handle .net /1969 .1 /ETD -TAMU -2724 .

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