Efficient vlsi yield prediction with consideration of partial correlations

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Title: Efficient vlsi yield prediction with consideration of partial correlations
Author: Varadan, Sridhar
Abstract: With the emergence of the deep submicron era , process variations have gained importance in issues related to chip design . The impact of process variations is measured using manufacturing /parametric yield . In order to get an accurate estimate of yield , the parameters considered need to be monitored at a large number of locations . Nowadays , intra -die variations are an integral part of the overall process uctuations . This leads to the difficult case where yield prediction has to be done while considering independent and partially correlated variations . The presence of partial correlations adds to the existing trouble caused by the volume of variables . This thesis proposes two techniques for reducing the number of variables and hence the complexity of the yield computation problem namely - Principal Component Analysis (PCA ) and Hierarchical Adaptive Quadrisection (HAQ ) . Systematic process variations are also included in our yield model . The biggest plus in these two methods is reducing the size of the yield prediction problem (thus making it less time complex ) without affecting the accuracy in yield . The efficiency of these two approaches is measured by comparing with the results obtained from Monte Carlo simulations . Compared to previous work , the PCA based method can reduce the error in yield estimation from 17 .1 % - 21 .1 % to 1 .3 % - 2 .8 % with 4 .6x speedup . The HAQ technique can reduce the error to 4 .1 % - 5 .6 % with 6x - 9 .4x speedup .
URI: http : / /hdl .handle .net /1969 .1 /ETD -TAMU -2503
Date: 2009-05-15


Efficient vlsi yield prediction with consideration of partial correlations. Available electronically from http : / /hdl .handle .net /1969 .1 /ETD -TAMU -2503 .

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